Doctor of Philosophy
University of Twente, Netherlands, 1991.
Master of Electronic Engineering
NUFFIC, Netherlands, 1987.
B.Sc. Eng. Hons.
University of Moratuwa, 1983.
- Advanced Electronic -Undergraduate -2016
- Electronic Design Realization -Undergraduate -2016
- Electronic Product Design and Manufacture -Undergraduate -2016
- Chairman -IPAC ( To date)
- Chairman -IPaC ( To date)
- Chairman -Examination Offence ( To date)
- PCW Sommen, JAKS Jayasinghe, “On frequency domain adaptive filters using the overlap-add method”, IEEE Philips Research Laboratories, 1988
- CLSC Fonseka, JAKS Jayasinghe, “Implementation of an automatic optical inspection system for solder quality classification of THT solder joints”, IEEE Transactions on Components, Packaging and Manufacturing Technology, 2018
- JAKS Jayasinghe, F Moelaert El-Hadidy, G Karagiannis, Otto E Herrmann, J Smit, “Two-level pipelined systolic array graphics engine”, IEEE Journal of Solid-State Circuits, 1991
- JAKS Jayasinghe, AAM Kuijk, L Spaanenburg, “A display controller for a structured frame store system”, Advances in Graphics Hardware III, ed. AAM Kuijk, Springer-Verlag (to appear in 1989). BT Phong,“Illumination for Computer Generated Images,” Communications of the ACM, 1989
- JAKS Jayasinghe, KKKD Nadishan, “Neural network based state of charge (SOC) estimation of electric vehicle batteries”, International Journal of Scientific and Research Publications, 2014
- S Fonseka, JAKS Jayasinghe, “‘Feature extraction and template matching algorithms classification for PCB fiducial verification”, J. Achievements Mater. Manuf. Eng, 2018
- CLSC Fonseka, JAKS Jayasinghe, “Color model analysis for solder pad segmentation on printed circuit boards”, International Journal of Scientific and Research Publications, 2016
- CLSC Fonseka, JAKS Jayasinghe, “Localization of component lead inside a THT solder joint for solder defects classification”, J. Achievements Mater. Manuf. Eng., 2017
- JAKS Jayasinghe, BS Samarasiri, GMAI Rajakaruna, “Aerodynamic drag and rolling resistance of three-wheelers”, Engineer: Journal of the Institution of Engineers, Sri Lanka, 2009
- Jayasinghe JAKS, “Two level pipeline of systolic array grphics engines”, Advances in computer graphics and CAD, 1991
- Jayasinghe Arachchige Kapila Sriyantha Jayasinghe, F Moelaert El-Hadidy, OE Hermann, “An array processor design methodology for hard real-time systems”, 1991 IEEE International Symposium on Circuits and Systems (ISCAS), 1991