Department Publications

The radio frequency (RF) cochlea, a biomimetic LCR transmission-line filter bank that performs O(N) broadband spectrum analysis, has been demonstrated in active CMOS and as passive microwave channelizers but has remained a one-dimensional (1-D) structure since its introduction two decades ago. We argue that the natural next step is to add a second dimension, and we explore three complementary aspects of this extension. First, we review existing 1-D RF cochlea architectures and present a 20-channel, 1 GHz constant-bandwidth passive channelizer as a representative implementation. Second, we analyze the two-dimensional (2-D) cochlear-duct geometry of Watts and Neely using finite-difference and Liouville–Green simulations: the second dimension introduces a cut-off mode whose interference with the traveling-wave mode produces an upper-skirt roll-off 1.6–1.7× steeper than the 1-D long-wave limit …

A high step-down, non-isolated, DC-DC converter composed of a switched-inductor is proposed in this paper. The switched-inductor utilizes a flying and switched-capacitor network to step-down the input voltage. The current-stress at the output capacitor has been reduced by the output inductor providing additional step-down. Equivalent circuits of the proposed converter are used to explain the operation in ideal conditions. The converter is further analyzed to investigate the impact of equivalent-series-resistances of switched-capacitors on the overall voltage gain. Moreover, expressions for voltage-current stresses of switching elements and design equations for passive devices have been derived at the steady-state analysis. Finally, the operation of the proposed converter is validated using simulations.

A multi-port spatio-temporal noise-shaping ADC is proposed to process plane waves received by spatially-oversampled antenna arrays. In the proposed multi-port ADC, the desired plane waves are processed with a spatial low-pass frequency response whereas the noise and distortion are shaped with a spatial high-pass frequency response. By employing a first-order Butterworth filter, approximately circular passbands and stopbands are achieved for the signal and the noise transfer functions, respectively. The proposed noise-shaping system is designed in the TSMC 180 nm CMOS process, with ADCs and DACs modeled as noise sources. Circuit simulation results show that the proposed system can achieve a bandwidth of 50 MHz.

This paper proposes a high step-up boost converter family which is based on a switched coupled inductor (SCL) and a voltage litter cell. The derivation of converter topologies of the family using SCL and voltage litter cell is explained in detail. The operation of the converters is explained using the converter which has the highest gain. The operation of the other converter topologies can be explained using a similar approach. The converter with the highest gain is theoretically analyzed assuming its operation in the continuous conduction mode (CCM) to obtain expressions for the static voltage gain, capacitor voltages, voltage stresses of switching elements, inductor currents and boundary mode operation. The operation of the converter is validated using simulation assuming near ideal conditions.

A family of ultra-high step-up DC-DC converters based on a feed-forward capacitor and a coupled-inductor is proposed. The voltage conversion ratio of the proposed converter family is a polynomial of the turns ratio of the coupled-inductor which is obtained by the time-multiplexing operation of the coupled-inductor and the feed-forward capacitor. The time multiplexed operation of the coupled inductor is explained with ideal waveforms which are employed to derive a generalized expression for the voltage conversion ratio of the proposed converter family. The operation of the proposed converter family is verified using simulation results.

A high-gain non-isolated DC-DC converter is proposed with a inversely coupled inductor and a voltage lift cell. Energy stored in the leakage inductance of the coupled inductor is recycled through a voltage lift cell to obtain high voltage conversion ratio. The operation of the proposed converter is explained using its equivalent circuits which are used to derive static gain expression. The operation of the proposed converter is analyzed with non-ideal components to predict their influence on voltage conversion ratio and the efficiency. The operation of the proposed converter is validated using software simulation under ideal and non-ideal conditions.

This paper presents the implementation and analysis of a low complex architecture for a fast locking Phase Locked Loop. In this paper, we analyse a high speed mixed signal PLL architecture and its components such as phase frequency detector, charge pump, voltage controlled oscillator etc. are further reviewed. The simulation results show that proposed PLL design achieves locking within 1 μβ and it operates at 5 GHz featuring a significant P k -P k jitter value less than 10 ps and root-mean-square jitter less than 5 ps. Mathematical modeling and simulations of the proposed PLL architecture are also presented.

In this paper a transformerless voltage source sine wave inverter is proposed. A previously developed tri-state boost converter is utilized for the stepping up operation. In this topology the dynamic response of the inverter is increased, by avoiding the right hand plane zero in the converter's small-signal control-to-output transfer function when operating in the continuous conduction mode. The reference voltage for the tri-state boost converter is determined from the measured output voltage of the sine wave inverter and the calculated instantaneous value of the sine wave. The inverter with the tri-state boost converter and the inverter with a classical boost converter with voltage mode control and current mode control are compared for the dynamic response and efficiency. The analytical work of the design has been verified using a simulation. Furthermore, the boost converter is implemented in hardware to verify the boost …

In this paper design and implementation of a wide input range Cascaded Buck and Boost (CBB) converter is presented with a robust power controller. Four new control strategies are proposed and tested for this converter based on input voltage and duty cycle of the control signals. Robust feature of the proposed control system ensures constant output DC current required to charge the Lead-Acid batteries in bulk charge mode. The robust feedback controller of the power converter is developed using a microcontroller which is acting as smart controller of the CBB converter. DC-DC converters which are used for battery charging applications with variable power sources should be able to both step-up and step-down the input voltage and provide high efficiency in the whole range of operation. The CBB converter with power switches and diodes is used to achieve above objective. CBB converter is constructed by cascading a Buck and a Boost Converter and eliminating the output capacitor of the buck converter.

The design and implementation of a low cost solid-state lamp driver and failure detector (LD/FD) for incandescent lamps is described. The design is directly targeted for the signal lamp heads in highway traffic signal systems. This is entirely hardware oriented and can be used to replace the relay systems currently used without doing any modification to control signals. The incorporated lamp failure detection circuitry enhances the features of the design by activating a feed back signal to indicate lamp failures. This feature enables us to develop an automated maintenance scheme in a centralized traffic control system such as the emerging Advanced Traffic Control System (ATCS).

The design and implementation of a high performance, automatic battery charger is described. The main target application of the design is for on-line battery backup systems requiring high reliability such as highway traffic signal controllers. The charger has the capability of charging maintenance-free lead-acid accumulators, where careful charging control is essential. This device can be used to charge normal lead-acid batteries as well.

Low Noise Pre-amplifiers (LNP) increase the quality of weak signals by amplifying them without introducing excessive noise generated inside the amplifier. The advantage of using LNP for weak TV signal reception is presented by extensive analysis of signal to noise ratio. A design of a LNP that operates satisfactorily over the 50-750 MHz frequency band is presented in this paper. Cost effectiveness and superior performance are the salient features of this design.