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1 publication found

An Automated Framework for Optimal Selection of Approximate Computing Units for Low-Complexity Trigonometric Transforms on FPGAs

Pathmapirian Nanthakumar, Chamith Wijenayake, Chamira U. S. Edussooriya, Arjuna Madanayake

Conference ISCAS 2026 IEEE International Symposium on Circuits and Systems (ISCAS) , pp. 180-184 · 2026 · Cited by 0

Digital Signal ProcessingFPGA and Reconfigurable ComputingHardware Acceleration and Co-design

Abstract

The optimal selection of approximate computing units towards low-complexity FPGA-based hardware architectures for approximate discrete cosine transform (ADCT) and approximate discrete Fourier transform (ADFT) are explored. The proposed methodology employs an existing library of FPGA based approximate adders to select Pareto-optimal 1 approximate adders for cascaded signal flow architectures found in ADCT and ADFT operations. Benefits are presented with examples from 8-point ADCT based image compression and 16-point ADFT based digital multi-beamforming applications. Examples demonstrate a nearly 25% LUT reduction in FPGA utilization compared to error-free computing, with a corresponding degradation of nearly 1 dB in terms of PSNR in image compression and 0.3 dB loss in SNR improvement in beamforming.