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3 publications found

Runtime rule-reconfigurable high throughput NIPS on FPGA

PMK Tharaka, DMD Wijerathne, Navoda Perera, Dinushan Vishwajith, Ajith Pasqual

Conference ICFPT 2017 International Conference on Field Programmable Technology (ICFPT) , pp. 251-254 · 2017 · Cited by 7

Network Optimization and IntelligenceFPGA and Reconfigurable Computing

Abstract

Most of the intrusion detection and prevention systems (NIDS/NIPS) are utilizing signature based matching which makes use of a stored rule base for distinguishing malicious network traffic. Dynamic rule-base updates has become a requirement due to the increasingly large number of new attack types identified every day, while the downtime associated with rule base updates has become a major drawback in hardware based Network Intrusion Prevention Systems. In addition, the NIPS are facing the challenge of expanding their throughput to cope with the ever growing high bandwidth requirement. This paper presents a novel scalable architecture for a NIPS with stateful packet inspection. The implementation is capable of processing Snort signatures and also analyzing packet streams to detect attacks with TCP segment manipulation. The system ensures run-time rule reconfigurability, which eliminates the risk of …

FPAA and FPGA based universal sensor node design

Ayanga Kalupahana, Nisal Hemadasa, Nipun Wijerathne, Anuranga Ranasinghe, Ajith Pasqual

Conference ICST 2017 Eleventh International Conference on Sensing Technology (ICST) , pp. 1-6 · 2017 · Cited by 2

Internet of Things and Sensor NetworksFPGA and Reconfigurable Computing

Abstract

Highly flexible FPAA and FPGA based universal sensor node design targeting researchers is discussed in this paper. The reconfigurable system is capable of supporting up to three low power analog sensors and two digital sensors in parallel. This facilitates dynamic configurability and remote monitoring by connecting the device to the internet. The design can be utilized in development of remote sensing devices to be establish at locations where frequent repairing and maintenance is difficult. Compensability for aging, adjustability to different environments, flexibility are key advantages of this system.

Hybrid Software Defined Networking Controller.

Kosala Perera, Udesh Gunarathne, Binal Chathuranga, Chamika Ramanayake, Ajith Pasqual

Conference DCNET , pp. 77-84 · 2017 · Cited by 2

Network Optimization and IntelligenceFPGA and Reconfigurable Computing

Abstract

There exists some common bottlenecks among the many available Software Defined Networking (SDN) controllers. Of these, the current analysis uses the Floodlight software controller to identify bottlenecks. The analysis has implemented these bottlenecks in a Field Programmable Gate Array (FPGA) in order to assess its feasibility. Thereafter, a Hybrid SDN controller has been developed. Generally Hybrid SDN refers to a networking approach where traditional networking and SDN protocols are used and operated in the same environment. Hybrid in this paper context refers to a controller which is developed both on software and hardware platforms in order to achieve a higher scalability which is a current issue existing in software controller, and thereby overcoming the identified bottlenecks. The analysis has offloaded computational intensive models to an FPGA and tested for performance. These performance figures have then been compared against the performance figures as of a stand-alone software controller.