Department Publications

Brain-computer interfaces (BCIs) require real-time feature extraction for translating input EEG signals recorded from a subject into an output command or decision. Owing to the inherent difficulties in EEG signal processing and neural decoding, many of the feature extraction algorithms are complex and computationally demanding. Presently, software does exist to perform real-time feature extraction and classification of EEG signals. However, the requirement of a personal computer is a major obstacle in bringing these technologies to the home and mobile user affording ease of use. We present the FPGA design and novel architecture of a generalized platform that provides a set of predefined features and preprocessing steps that can be configured by a user for BCI applications. The preprocessing steps include power line noise cancellation and baseline removal while the feature set includes a combination of linear …

Complex Event Processing (CEP) is an emerging field in high performance computing paradigm where real time (low latency) computing capability is expected over big data processing (high throughput). Significant number of software architectures have been developed to improve the throughput while reduce the latency but maintaining of the both aspects reaches the limits of the software platforms. This paper proposes a novel custom hardware accelerator architecture framework for CEP in big data domain. The proposed design improves the throughput performance more than 10 times over the software counterpart while keeping the latency value at less than 100 nano seconds. Same Structured Query Language(SQL) type queries used in reference software architecture were used to improve the flexibility. A query compiler based on the same query language grammar was designed to convert the queries in to …