Department Publications

Motion Blur due to the relative motion between the camera and object can seriously degrade image quality. We present an FPGA based motion blur detection and correction algorithm which is implemented on top of a configurable soft-processor based architecture. The system consists of two main modules. The blur detection module identifies the blur length and angle, and the restoration module uses regularized inverse filtering to remove the motion blur. The Processing algorithms are implemented as separate cores on the FPGA fabric where the soft processor core is only used for managing system configuration. The system can achieve a frame rate of 15fps for a 720p HD video stream.

In computer vision crass-correlation is a standard approach for local feature matching in feature tracking applications. For this Normalized cross-correlation (NCC) is implemented on spatial domain, because it does not have a simple and efficient frequency domain expression. Therefore in applications which demand real-time processing, a dedicated hardware implementation of NCC is essential to meet the computational cost in spatial domain. In this paper we present a Field Programmable Gate Array (FPGA) implementation of NCC based on the multi-port memory controller together with Fast Normalize Cross-correlation. Practical experimentation shows that our system can achieve frame rates closer to 100 for a search window size of 100x100 and template size of 15x15, with only using two dual-port memories.