Department Publications

This paper presents an effective method of identifying elephant rumbles in infrasonic seismic signals. The design and implementation of electronic circuitry to amplify, filter, and digitize the seismic signals captured through geophones are presented. A collection of seismic infrasonic elephant rumbles was collected at a free-ranging area of an elephant orphanage in Sri Lanka. The seismic rumbles were converted to spectrograms, and several methods were used for spectral feature extraction. Using LasyPredict, the features extracted using different methods were fed into their corresponding machine-learning algorithms to train them for automatic seismic rumble identification. It was found that the Mel frequency cepstral coefficient (MFCC) together with the Ridge classifier machine learning algorithm produced the best performance in identifying seismic elephant rumbles. A novel method for denoising the spectrum that leads to enhanced accuracy in identifying seismic rumbles is also presented.

A low-complexity multibeamforming scheme for uniform linear arrays is proposed based on warped and approximated discrete Fourier transform (DFT), albeit in the spatial domain. Conventional DFT- and approximated-DFT-based multibeamformers provide a low-complexity alternatives to produce multiple simultaneous beams with fixed beam profiles. The proposed approach aims to produce configurable (i.e., steerable) multibeam profiles using the warped DFT. Design examples are presented for an 8-element uniform linear array verifying, 81% and 18 % reduction in multiplier and adder complexities, respectively, when compared to a conventional narrowband multibeamformer having dedicated steering weights for each beam. Three system configurations are proposed using approximations for warped transform and the DFT. Hardware designs implemented on Xilinx Ultrascale KCU105 FPGA device verify 5.2 …

The optimal designs of multi-dimensional (M-D) complex-coefficient finite-extent impulse response (FIR) filters with low group delays predominantly consider only the minimization of the frequency response error. This leads to substantial deviation of the group delay from the desired constant group delay of such a filter, especially near the passband edges. In this paper, we propose a minimax design method for M-D complex-coefficient FIR filters with reduced group delay error. We incorporate constraints on phase response error while minimizing the frequency response error. We formulate the proposed minimax design method as a second-order cone programming problem. Design examples confirm that the proposed minimax design method significantly reduces the group delay error compared to previously proposed methods.

Broadband beamformers designed as two-dimensional (2-D) spatially-interpolated finite-extent impulse responses (FIR) filters, using a cascade structure, cannot employ sparse linear arrays despite significantly reducing the computational complexity. This happens due to the fact that the 2-D masking filter requires spatial samples equal to the spatial order at the input. Therefore, the output of the 2-D spatially-interpolated prototype filter should be computed for more than one spatial index. In order to address this limitation, we propose a 2-D spatially-interpolated FIR filter using a parallel structure. With the proposed structure, both 2-D spatially-interpolated prototype filter and the 2-D masking filter need to compute the output only for one spatial index, therefore allowing to employ sparse linear arrays. In order to support broadband beamforming, we design the 2-D FIR filter to have a parallelogram passband …

The use of approximate transforms in conjunction with approximate adder hardware is explored towards implementing low-complexity multi-beam antenna arrays. The use of approximate adders is motivated by the efficient look up table (LUT) usage on field programmable gate arrays (FPGA) resulting in better area and time complexities on hardware. 8-beam and 16-beam hardware architectures for multi-beamforming are designed using previously reported 8-point and 16-point spatial approximate-DFT (ADFT) algorithms, respectively, albeit with approximate adders. Designs have been implemented on Xilinx Kintex UltraScale KCU105 FPGA device verifying 31.5% reduction in (FPGA) LUT count and 58.08% improvement in critical path delay with a maximum beam error of 0.6 degrees and maximum peak side lobe level deviation 0.21 dB for the 8-beam case, when compared to ADFT with accurate adders with the …